International Electrotechnical Commission standards (IEC 555-2) set forth permissible harmonic content which may be fed back into a power system. As such, in Europe, IEC 555-2 specifications require a ballast that draws more than 25 W to meet very stringent input current harmonic distortion standards. The harmonic content of the input current also determines the power factor of the circuit, i.e., the input power divided by the product of the rms voltage and rms current. Furthermore, to meet industry requirements for efficiency and length of lamp life, the lamp current crest factor, i.e., the ratio of the peak lamp current to its rms value, must be less than 1.7. Unfortunately, the power factor and crest factor requirements tend to conflict with each other, especially in low cost circuits.
An integrated boost circuit that meets the IEC 555-2 specifications is described in U.S. patent application Ser. No. 07/934,843 of L. R. Nerone and D. J. Kachmarik, filed Aug. 25, 1992 and assigned to the instant assignee. The integrated boost circuit is used for powering a load with bi-directional current and comprises a full-wave rectifier, a series half-bridge converter, and a boost converter. The series half-bridge converter includes a first switch interposed between the bus conductor and a bridge-switch end of the load circuit; a second switch interposed between a ground conductor and the bridge-switch end of the load circuit; and a switching control circuit for alternately switching on the first and second switches. The boost converter comprises a boost capacitor connected between the bus and ground conductors, the level of charge on the boost capacitor determining the bus voltage on the bus conductor; a boost inductor connected by a one-way valve to the boost capacitor for discharging its energy into the boost capacitor; and a low-impedance path for periodically connecting a load end of the boost inductor to the ground conductor, thereby charging the boost inductor.
Advantageously, the integrated boost circuit meets the IEC and crest factor requirements for a fluorescent discharge lamp ballast; however, it requires a bus voltage approximately twice the peak line voltage. Since rectification of the 230 V European line voltage is 325 V, voltage doubling results in a device stress of 650 V, requiring a 800 V power MOSFET.
In recent years, other high power factor circuits have been proposed, including circuits described in: Steigerwald et al. U.S. Pat. No. 4,642,745; Fahnrich et al. U.S. Pat. No. 4,782,268; Fahnrich et al. U.S. Pat. No. 4,808,887; and Zuchtriegel U.S. Pat. No. 5,008,597. In general, the power factor correction circuits of these patents attempt to draw current from the line during the low voltage periods by connecting a number of capacitors and/or inductors between the high frequency circuit and the line via some diodes. An electrolytic capacitor gets charged by a pumping action of these components. The amount of energy stored in the electrolytic capacitor is proportional at every instant to the value of the input ac line voltage. The average current being drawn from the line is also proportional to the voltage. Therefore, the input power factor is very high and the harmonic content of the current is very low. Most of these circuits require a relatively large number of components.
Accordingly, it is desirable to provide a power circuit that meets worldwide input power factor and input current harmonic specifications. Furthermore, it is desirable to provide an economical power factor correction circuit for fluorescent lamp ballasts while meeting lamp current crest factor specifications with a minimal number of components, and without requiring high voltage power devices.